Nilanjan Goswami, Ph.D.

Graphics Architect, System/Hardware



Nilanjan is a
Principal Graphics Architect at the Qualcomm Technologies Inc. (Santa Clara, CA). He works in the area of 2D and 3D graphics pipeline architecture optimization for advanced rendering techniques, virtual reality, and augmented reality. He has years of experience in working on tile-based and immediate-mode computer graphics rendering techniques for low-power, high-efficiency mobile graphics pipelines. During his years of industry experience, he also worked on image, audio, and video processing.

He graduated with Ph.D. in Computer Architecture from the
Department of Electrical and Computer Engineering at the University of Florida. His research interest includes architecture for deep learning, virtual/augmented reality, computer graphics, etc.

Interest/Expertise

  • Architectures for Augmented/Virtual reality devices.
  • Tile-based / Multi-pass / Immediate-mode graphics rendering hardware architecture (TBDR / TBMR / IMR).
  • Hidden surface removal algorithm in TBDR/TBMR/IMR hardware rendering pipeline.
  • 2D content and text rendering using advanced anti-aliasing technique.
  • Distorted space graphics rendering.
  • Compression techniques for various graphics data structures.
  • Fragment interpolator architecture optimization for various graphics hardwares.
  • Vertex processing optimization including but not limited to primitive culling, attribute fetch optimization, binning.
  • Game engine architecture (ECS, semantic graph based design).

Selected Publications

On Power-Performance Characterization of Concurrent Throughput Kernels, Nilanjan Goswami,Yuhai Li, Amer Qouneh, Chao Li and, Tao Li, IEEE International Symposium on Workload Characterization (IISWC), October 2015.

GPGPU-MiniBench: Accelerating GPGPU Micro-Architecture Simulation, Zhibin Yu, Lieven Eeckhout, Nilanjan Goswami, Tao Li, Lizy K. John, Hai Jin, Chengzhong Xu, IEEE Transactions on Computers, December 2014.

iConn: A Communication Infrastructure for Heterogeneous Computing Architectures, Zhongqi Li, Nilanjan Goswami, and Tao Li, ACM Journal on Emerging Technologies in Computing Systems, September 2014.

Exploring Silicon Nanophotonics in Throughput Architecture, Nilanjan Goswami, Zhongqi Li, Ramkumar Shankar and Tao Li, IEEE Design and Test Magazine (Silicon Nanophotonics for Future Multicore Architectures Issue), August 2014.

On Characterization of Performance and Energy Efficiency in Heterogeneous HPC Cloud Data Centers, Amer Qouneh, Nilanjan Goswami, Ruijin Zhou, and Tao Li, International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), August 2014.

Software Transactional Memory for GPU Architectures, Yunlong Xu, Rui Wang, Nilanjan Goswami, Tao Li and Depei Qian, International Symposium on Code Generation and Optimization (CGO), February 2014. [Best paper nominee]

Chameleon: Adapting Throughput Server to Time-Varying Green Power Budget Using Online Learning, Nilanjan Goswami, Chao Li, Rui Wang, Xian Li, Tao Li and Depei Qian, International Symposium on Low Power Electronics and Design (ISLPED), September 2013.

Power-performance Co-optimization of Throughput Core Architecture using Resistive Memory, Nilanjan Goswami, Bingyi Cao and Tao Li, IEEE International Symposium on High Performance Computer Architecture (HPCA), February 2013.

Analyzing Soft-Error Vulnerability on GPGPU Microarchitecture, Jingweijia Tan, Nilanjan Goswami, Tao Li, and Xin Fu, IEEE International Symposium on Workload Characterization (IISWC), November 2011.

Exploring GPGPU Workloads: Characterization Methodology, Analysis and Microarchitecture Evaluation Implication, Nilanjan Goswami, Ramkumar Shankar, Madhura Joshi, and, Tao Li, IEEE International Symposium on Workload Characterization (IISWC), December 2010.